Department of Computer Science

University of Arkansas

Syllabus

Fall 2002

CSCI 5023 Architecture of Computer Systems An advanced study of both classical and recent computer hardware and software systems. Prerequisite: CSCE 3213 and CSCE 4413

Textbooks: Advanced Computer Architecture by Kai Hwang, McGraw-Hill, Inc. 1993

Supplementary Textbook (H&P): Computer Architecture A Quantitative Approach by John L. Hennessy and David A. Patterson, Morgan Kauffman Publishers, Inc. 1990

Objectives: This is a course in the study of advanced computer architectural concepts

Grading: Homework problems will be assigned each day of class, but they will not be collected.  We will discuss the solutions to the homework questions in class.  Students might be asked to exhibit their solutions on the chalkboard.  Grades will be based upon two tests, a Mid Term test and a Final Test.  They will each count 50% of the final score.  Questions for the tests will be based upon the homework and reading assignments.

The grading scale is: 90%-100% = A; 80%-89% = B; 70%-79% = C; 60%-60% = D; below 60% = F.

Attendance and Inclement Weather Policy: Faithful attendance is strongly suggested in order to keep up with the course topics. If an examination is missed, then a bona-fide excuse will be required in order for a makeup examination to be administered.

There will be no classes on days on which the University is officially closed. On days when the University is open, yet traveling is hazardous, use your best judgment on coming to class. If you miss some required work or assignment because of bona-fide traveling hazards, then you will be given a reasonable opportunity to make up the missed work.


Topics Covered

Topics from the following chapters will be covered.

Chapter 1. Parallel Computer Models

Chapter 2. Program and Network Properties

                        Interconnection Networks

Chapter 3. Principles of Scalable Performance
 

·         Hennessy and Patterson Topics( H & P On Reserve in the Library)

·         Performance Measures

·         Instruction Set Design


Chapter 4. Processors and Memory Hierarchy

Chapter 5. Bus, Cache and Shared Memory

Chapter 6. Pipelining and Superscalar Techniques

Chapter 7. Multiprocessors and Multicomputers

Chapter 10. Parallel Models, Languages, and Compilers