Integrating Asynchronous Digital Design and Testing into the Undergraduate Computer Engineering Curriculum
COURSE MODULES
Overview
Objectives
VHDL Library
VLSI Libraries
Course Modules
NCL Publications
People
Sponsor
1)
Intro to Asynchronous Logic
2)
Intro to NCL
3)
Transistor-Level NCL Gate Design
4)
Input-Completeness and Observability
5)
Dual-Rail NCL Design
6)
Quad-Rail NCL Design
7)
NCL Throughput Optimization
8)
Group Projects
Slides
Slides
Slides
Slides
Slides
Slides
Slides
Example Problems
Example Problems
Example Problems
Example Problems
Example Problems
Contact Us
Professors: Please send us an email and we will gladly provide you with solutions to the example problems.