The TRUTH (Trustable Recognition of Undesired Threats in Hardware) analysis tool is a prototype software to perform hardware Trojan threat modeling on an IC design at the RTL level of abstraction. Given the VHDL design files and certain information provided by the user, the TRUTH tool analyzes the circuits for likely inserted Trojans. Each potential Trojan attack is analyzed for its associated risk. The tool then provides a list of these Trojans and their risks to the user for further inspection.

This Java-based TRUTH tool is still under heavy development and this release is an alpha version which has several limitations in VHDL language support and threat modeling mechanisms. Users may refer to the help files for details. After downloading, there is no installation needed. Just unzip the package (about 3.6MB) and run the .jar file. Note that the use of this tool should be limited to educational purposes or personal interests; otherwise please notify Dr. Jia Di at

Your feedback will help us make TRUTH better! Please fill out the form below so we will know who is interested in our work. Also please email your comments and suggestions to Dr. Jia Di at

Acknowledgement: The team would like to thank Dr. Christoph Grimm from the University of Frankfurt, Germany, for his work in VHDL parser, which has been modified and incorporated in the TRUTH tool.

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